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  ? semiconductor components industries, llc, 2015 may, 2015 ? rev. p1 1 publication order number: NVD4C05N/d NVD4C05N product preview power mosfet 30 v, 4.1 m  , 90 a, single n?channel features ? low r ds(on) to minimize conduction losses ? low q g and capacitance to minimize driver losses ? aec?q101 qualified and ppap capable ? these devices are pb?free, halogen free/bfr free and are rohs compliant maximum ratings (t j = 25 c unless otherwise noted) parameter symbol value unit drain?to?source v oltage v dss 30 v gate?to?source v oltage v gs  20 v continuous drain cur- rent r  jc (notes 1 & 3) steady state t c = 25 c i d 90 a t c = 100 c 64 power dissipation r  jc (note 1) t c = 25 c p d 57 w t c = 100 c 28 continuous drain cur- rent r  ja (notes 1, 2 & 3) steady state t a = 25 c i d 22 a t a = 100 c 16 power dissipation r  ja (notes 1 & 2) t a = 25 c p d 3.5 w t a = 100 c 1.7 pulsed drain current t a = 25 c, t p = 10  s i dm 270 a operating junction and storage temperature t j , t stg ?55 to 175 c source current (body diode) i s 75 a single pulse drain?to?source avalanche energy (t j = 25 c, i l(pk) = 5.6 a, l = 10 mh) e as 157 mj lead temperature for soldering purposes (1/8 from case for 10 s) t l 260 c stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. thermal resistance maximum ratings parameter symbol value unit junction?to?case (drain) (note 1) r  jc 2.65 c/w junction?to?ambient ? steady state (note 2) r  ja 43 1. the entire application environment impacts the thermal resistance values shown, they are not constants and are only valid for the particular conditions noted. 2. surface?mounted on fr4 board using a 650 mm 2 , 2 oz. cu pad. 3. maximum current for pulses as long as 1 second is higher but is dependent on pulse duration and duty cycle. this document contains information on a product under development. on semiconductor reserves the right to change or discontinue this product without notice. dpak case 369c style 2 marking diagram & pin assignment 30 v 4.1 m  @ 10 v r ds(on) 90 a i d v (br)dss 6.0 m  @ 4.5 v www. onsemi.com 1 2 3 4 see detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. ordering information 1 gate 2 drain 3 source 4 drain ayww 4c05ng a = assembly location y = year ww = work week 4c05n = device code g = pb?free package g s n?channel mosfet d
NVD4C05N www. onsemi.com 2 electrical characteristics (t j = 25 c unless otherwise noted) parameter symbol test condition min typ max unit off characteristics drain?to?source breakdown voltage v (br)dss v gs = 0 v, i d = 250  a 30 v drain?to?source breakdown voltage temperature coefficient v (br)dss /t j 14.9 mv/ c zero gate voltage drain current i dss v gs = 0 v, v ds = 24 v t j = 25 c 1.0  a t j = 125 c 10 gate?to?source leakage current i gss v ds = 0 v, v gs = 20 v 100 na on characteristics (note 4) gate threshold voltage v gs(th) v gs = v ds , i d = 250  a 1.3 2.2 v negative threshold temperature coefficient v gs(th) /t j 4.7 mv/ c drain?to?source on resistance r ds(on) v gs = 10 v, i d = 45 a 3.4 4.1 m  v gs = 4.5 v, i d = 45 a 4.5 6.0 charges, capacitances and gate resistances input capacitance c iss v gs = 0 v, f = 1.0 mhz, v ds = 25 v 1970 pf output capacitance c oss 725 reverse transfer capacitance c rss 30 total gate charge q g(tot) v gs = 10 v, v ds = 24 v, i d = 45 a 31 nc total gate charge q g(tot) v gs = 4.5 v, v ds = 24 v, i d = 45 a 14 nc threshold gate charge q g(th) 3.3 gate?to?source charge q gs 6.2 gate?to?drain charge q gd 3.2 plateau voltage v gp 3.1 v gate resistance r g 1.0  switching characteristics (note 5) turn?on delay time t d(on) v gs = 4.5 v, v ds = 24 v, i d = 45 a, r g = 0  11 ns rise time t r 107 turn?off delay time t d(off) 17 fall time t f 6.0 drain?source diode characteristics forward diode voltage v sd v gs = 0 v, i s = 45 a t j = 25 c 0.9 1.2 v t j = 125 c 0.8 reverse recovery time t rr v gs = 0 v, dis/dt = 100 a/  s, i s = 45 a 41 ns charge time ta 21 discharge time tb 20 reverse recovery charge q rr 26 nc 4. pulse test: pulse width 300  s, duty cycle 2%. 5. switching characteristics are independent of operating junction temperatures. ordering information order number package shipping ? NVD4C05Nt4g dpak (pb?free) 2500 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
NVD4C05N www. onsemi.com 3 package dimensions dpak (single gauge) case 369c issue e b d e b3 l3 l4 b2 m 0.005 (0.13) c c2 a c c z dim min max min max millimeters inches d 0.235 0.245 5.97 6.22 e 0.250 0.265 6.35 6.73 a 0.086 0.094 2.18 2.38 b 0.025 0.035 0.63 0.89 c2 0.018 0.024 0.46 0.61 b2 0.028 0.045 0.72 1.14 c 0.018 0.024 0.46 0.61 e 0.090 bsc 2.29 bsc b3 0.180 0.215 4.57 5.46 l4 ??? 0.040 ??? 1.01 l 0.055 0.070 1.40 1.78 l3 0.035 0.050 0.89 1.27 z 0.155 ??? 3.93 ??? notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: inches. 3. thermal pad contour optional within di- mensions b3, l3 and z. 4. dimensions d and e do not include mold flash, protrusions, or burrs. mold flash, protrusions, or gate burrs shall not exceed 0.006 inches per side. 5. dimensions d and e are determined at the outermost extremes of the plastic body. 6. datums a and b are determined at datum plane h. 7. optional mold feature. 12 3 4 5.80 0.228 2.58 0.102 1.60 0.063 6.20 0.244 3.00 0.118 6.17 0.243  mm inches  scale 3:1 *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* h 0.370 0.410 9.40 10.41 a1 0.000 0.005 0.00 0.13 l1 0.114 ref 2.90 ref l2 0.020 bsc 0.51 bsc a1 h detail a seating plane a b c l1 l h l2 gauge plane detail a rotated 90 cw  e bottom view z bottom view side view top view alternate construction note 7 style 2: pin 1. gate 2. drain 3. source 4. drain on semiconductor and are registered trademarks of semiconductor co mponents industries, llc (scillc). scillc owns the rights to a numb er of patents, trademarks, copyrights, trade secrets, and other inte llectual property. a listing of scillc?s pr oduct/patent coverage may be accessed at ww w.onsemi.com/site/pdf/patent?marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/ or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typical s? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or a uthorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in whic h the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or us e scillc products for any such unintended or unauthorized appli cation, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unin tended or unauthorized use, even if such claim alleges that scil lc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyrig ht laws and is not for resale in any manner. p ublication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5817?1050 NVD4C05N/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc al sales representative


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